Power semiconductor devices, such as power metal-oxide-semiconductor field-effect transistors (MOSFETs) and insulated-gate bipolar transistors (IGBTs), can be used as switching elements (or “switches”) for switching loads.
A driver circuit is used to apply a signal to a gate of a power semiconductor device so as to switch the device between OFF and ON states. The switching speed of the device (herein referred to as the “slew rate”) can be controlled so as to be sufficiently quick to reduce power losses, but slow enough to avoid high-frequency transients which can result in radiative electromagnetic interference.
FIG. 1 is a schematic diagram of a first commonly-used driver circuit for a high-side n-channel MOSFET which switches a load, Z. The drain of the MOSFET is tied to a positive voltage source, VBAT, and the source is connected to one terminal of the load. The other terminal of the load is tied to ground, GND, via a low-side switching element. The high-side gate driver circuit includes a switchable voltage source coupled to the gate of the MOSFET via a resistor, R. The voltage source can be switched between a positive supply voltage, VCP, and ground, GND. Parasitic capacitances include the gate-to-drain capacitance, CGD, and a gate-to-source capacitance, CGS. The gate-to-drain capacitance, CGD, is commonly referred to as the “Miller capacitance”. The slew rate depends on the value of the resistor and the Miller capacitance.
Although the first driver circuit is simple and easy to implement, it suffers one or more drawbacks. First, there is no feedback loop and so the driver circuit does not permit the slew rate to be continuously controlled. Furthermore, the resistor is usually a discrete component which can increase the bill of materials. The driver circuit typically has a wide range of slew rates. There are also large time delays resulting from the rise in gate charge QG to the onset of the Miller plateau resulting from the Miller capacitance and a slow rate of rise in gate charge QG above the onset of the Miller plateau which is caused by the gate-to-drain capacitance, CGD.
FIG. 2 is a schematic diagram of a second commonly-used driver circuit for a high-side n-channel MOSFET for switching a load.
The second driver circuit uses a programmable current controller. The driver circuit is simple and easy to implement and allows slew rate to be continuously controlled. However, it shares some of the drawbacks of the first driver circuit, such as timing delays.
DE 103 46 307 B3 describes a low-side driver circuit for controlling a low-side MOSFET connected in series with a load. A capacitor is connected between the gate of the MOSFET and ground. However, the driver circuit, like the first commonly-used driver circuit, does not permit the slew rate to be continuously controlled.
U.S. Pat. No. 5,397,967 B describes a high-side gate driver circuit for controlling a high-side field-effect transistor. The circuit includes an operational amplifier whose output is connected to the gate of a field-effect transistor thereby providing a closed loop voltage follower. A capacitor is connected between a non-inverting input of the amplifier and a reference potential or ground. A current source is connected in parallel with the capacitor between the non-inverting input of the amplifier and the reference potential or ground.
Slew rate is controlled by voltage ramp up or down at the input of the closed loop voltage follower. The driver circuit can compensate for parasitic capacitances and tolerate a wide range. Timing can be optimised by reducing start time.
U.S. Pat. No. 6,072,289 B describes a system for controlling slew rate in a motor control circuit for a motor comprises a high-side switching device coupled to a coil of the motor. A high-side slew rate control circuit controls a slew rate of a voltage excitation signal applied to a coil. The slew rate control circuit includes an amplifier having an output coupled to an input of the high-side switching device, a current sink coupling a first input of the amplifier to ground, a capacitor coupling the first input of the amplifier to ground and a feedback path from an output of the high side switching device to a second input of the amplifier.
U.S. Pat. No. 5,589744 B describes a circuit for controlling the slew rate at a motor coil during turn-on in a commutation sequence. The circuit includes a comparator for comparing the output of an error amplifier with the input of an input buffer amplifier. The comparator connects the output of the error amplifier to the input of the buffer amplifier only after the input has been charged at a controlled rate. An integrating buffer amplifier includes an amplifier with a feedback capacitor, and a current source connected at its input, for reducing the voltage slew rate during turn-on of the transistor.